User Guide for AMDGPU Backend#
Introduction#
The AMDGPU backend provides ISA code generation for AMD GPUs, starting with the
R600 family up until the current GCN families. It lives in the
llvm/lib/Target/AMDGPU directory.
LLVM#
Target Triples#
Use the Clang option --target=<Architecture><SubArch>-<Vendor>-<OS>-<Environment>
to specify the target triple.
Note
Historically, the single top-level amdgcn architecture was used
for all devices and specific devices by the subtarget. It has been
replaced with the amdgpu architecture combined with a subarch
suffix. The legacy spelling is accepted for accepted for
compatibility.
Architecture |
Description |
|---|---|
|
AMD GPUs HD2XXX-HD6XXX for graphics and compute shaders. |
|
AMD GPUs GCN GFX6 onwards for graphics and compute shaders. |
|
Legacy alias for |
The following table lists each major subarch and the minor subarches it covers. The Default Processor column gives the generic processor that a major subarch selects by default for code generation; this is the corresponding generic processor for families that have one (see AMDGPU Generic Processors). Major subarches listed as (none) are placeholders for families that do not yet have a generic target. See Subarchitecture Compatibility for how subarches are matched.
Major Subarch |
Default Processor |
Covered Subarches (Processor) |
|---|---|---|
|
(none) |
|
|
(none) |
|
|
(none) |
|
|
(none) |
|
|
|
|
|
(none) |
|
|